Computer systems are being embedded in more applications or devices. This enables devices with greater capabilities and adaptable features, which may be changed by programming embedded computer or processor systems. In order to embed a processor, memory for the processor must also be supplied. Such memory is typically FLASH memory. FLASH memory provides reliability and maintains data without requiring power, thus allowing for rugged operation. At the same time, FLASH memory may be programmed, allowing for changes and maintenance of code or data stored therein.
Communication between memory and a processor typically occurs over a bus. Memory typically is designed to provide data along a large number of signal lines. A processor is often designed to communicate data along a universal serial bus. Unfortunately, the universal serial bus provides for only two data lines. Thus, a memory module including FLASH memory must be controlled using those two data lines. This means that any control signal must be encoded along those two data lines. If a design implemented one of the data lines as a reset signal, for example, then only one data line would be available for actual data transmission. Similarly, if a design implemented one of the data lines as a reset signal, then only one data line would be available for actual data transmission. Thus, it may be useful to provide a universal serial bus that can accommodate control and data signals.